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I am unsure the proper way to set up the initial equations on this. I do not need answer, just help setting up. I am unsure how to handle the parallel portion in this. Do I use KLR first or is this like the time constant where I can find total circuit resistance then solve with capacitance information?

MIT 6.002 Circuits and Electronics, Spring 2007
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I suppose you have to characterize this circuit in the frequency domain, so just use capacitor reactance (1/jwC)
convert the C to it's equivalent reactive impedance and then use the voltage divider rule to find the voltage drop in terms of vi and so in the final ratio vi should get canceled and you should be left with a frequency (or time) based term.

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