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If you have a current source in a loop, you know the current in or out the two nodes it is conneceted. The other componets determine the voltage difference across the current source itself and you find this applying the kvl.
Hoping to be helpufull.
Thnx .. Can you tell me further more. I want to know when we apply super mesh analysis? I'm very confused in all this.
You have a supermesh when a current source is contained in two essential mesh.
Don't worry about this!
As I usually say to students: when you must analyse a circuit, move inside it and try to gain the most information you can by each COMPONENT. I mean, "jump" on it!
In such a way, if you are analysing a circuit and you correctly use KVL KCL to write voltage difference around a loop or a superposition of current in a node, stop a moment to see if components say you somenthing more.
A current source say you that your mental superposition of the currents you draw inside it must be equal to the current source value.
You are not doing nothing different from KVL when in the expression you write, you establish that the voltage difference in the branch where voltage source stays is exactly the voltage source value.
Yeah @stefo it is very much clear by ur explanation & by figure..
means we directly calculate 'I' without applying KVL to that loop which is containing "I" in the figure.
you're right. Now I fully understand your original question: KVL say you about the voltage difference. So if you consider a current source in a loop which contain a current source the voltage difference on it is unknown. As I wrote in the first responce, "The other componets determine the voltage difference across the current source". I mean KVL is applied elsewhere.
Okay! thanks for clearing my doubt. :)
As I'm little weak in all these concepts plz if you find any material regarding network analysis share with me any time ;)