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AdJ
Group Title
design a circuit that implements a 3input logic gate that implements Z=¬(C(A+B)) where the ¬ symbol stands for logical negation
 2 years ago
 2 years ago
AdJ Group Title
design a circuit that implements a 3input logic gate that implements Z=¬(C(A+B)) where the ¬ symbol stands for logical negation
 2 years ago
 2 years ago

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kashyap Group TitleBest ResponseYou've already chosen the best response.1
tw0 m0sfets with inputs A & B in parallel and a m0sfet with input C shall be in series with the ab0ve parallel c0mbinati0n
 2 years ago

kashyapbharat48 Group TitleBest ResponseYou've already chosen the best response.0
dw:1349197904504:dw
 one year ago

kashyap Group TitleBest ResponseYou've already chosen the best response.1
dw:1349273509655:dw
 one year ago

kashyapbharat48 Group TitleBest ResponseYou've already chosen the best response.0
@kashyap : pmos part of your ckt shud also b dere
 one year ago

kashyap Group TitleBest ResponseYou've already chosen the best response.1
Pm0s secti0n w0uld have been there if the questi0n w0uld menti0n CM0S techn0l0gy ... f0r the MIT c0urse , this is right !!
 one year ago
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