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anonymous
 4 years ago
design a circuit that implements a 3input logic gate that implements Z=¬(C(A+B)) where the ¬ symbol stands for logical negation
anonymous
 4 years ago
design a circuit that implements a 3input logic gate that implements Z=¬(C(A+B)) where the ¬ symbol stands for logical negation

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anonymous
 4 years ago
Best ResponseYou've already chosen the best response.0tw0 m0sfets with inputs A & B in parallel and a m0sfet with input C shall be in series with the ab0ve parallel c0mbinati0n

anonymous
 4 years ago
Best ResponseYou've already chosen the best response.0dw:1349197904504:dw

anonymous
 4 years ago
Best ResponseYou've already chosen the best response.0dw:1349273509655:dw

anonymous
 4 years ago
Best ResponseYou've already chosen the best response.0@kashyap : pmos part of your ckt shud also b dere

anonymous
 4 years ago
Best ResponseYou've already chosen the best response.0Pm0s secti0n w0uld have been there if the questi0n w0uld menti0n CM0S techn0l0gy ... f0r the MIT c0urse , this is right !!
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