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How do you know when to add the an inverter to the output of a complex CMOS logic gate? I always go directly to the pull down network, then take the dual for the pull up network, but then I usually add the inverter; But some examples I have seen do not do this.

MIT 6.002 Circuits and Electronics, Spring 2007
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Depends on your approach either way is ok. but its always good to think in terms of number of transistors being used. say u have (ab+cd')' its dual will be (a'+b')(c'+d). compare the number of transistors used in both the implementations and decide which one will uses lesser number. because when you are actually working on a chip design, even a single transistor will effect the design

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